For our summer meeting we are focusing on soft core implementations of RISC-V.
David Harris and Daniel Torres, Harvey Mudd College
In the light of the current level of COVID-19, this event will be purely online. There is no requirement to register, you can just connect to livestream using BigBlueButton. Thank you to GWDG for providing hosting for the virtual meeting. We are also recording the talks for later posting on our YouTube channel.
The livestream link will be open from 18:00 for networking, and the event will start at 18:30 prompt. We’ll keep the link open afterward for discussion.
The Wally RISC-V Core: The trials and tribulations of benchmarking
Wally is a Verilog RISC-V soft core, developed by Prof David Harris and Daniel Torres to support the Advanced Digital Design course at Harvey Mudd College. In this talk David Harris will describe the design of Wally, and the key design decisions. Daniel Torres will then look at the challenges of benchmarking a core using Embench (www.embench.org) using event driven simulation. The outcome is a number of ideas for improving the Embench benchmark suite.
About the speakers
David Money Harris is a Professor of Engineering and Associate Director of the Engineering Clinic Program at Harvey Mudd College. Dr. Harris received his Ph.D. from Stanford University in 1999 and his S.B. and M. Eng. degrees from MIT in 1994. His research interests include high speed CMOS VLSI design and computer arithmetic. He is the author or coauthor of CMOS VLSI Design: A Circuits and Systems Perspective, Digital Design and Computer Architecture, Logical Effort, Skew-Tolerant Circuit Design, and Afoot and Afield Inland Empire. He holds a dozen patents, has written numerous papers, and has designed chips at Sun Microsystems, Intel, Hewlett-Packard, and Evans & Sutherland.
Daniel Torres is Academic Excellence Tutor at Harvey Mudd College. He has been leading the work to benchmark the Wally core using Embench.
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This event is brought to you by: BCS Open Source specialist group